Verilog

Overview Design. Simulate. Innovate. Verilog is a two-round digital design competition of Addovedi 2026 (NIT Arunachal Pradesh), organised by the ECE Society. It tests your digital logic fundamentals and your ability to model, simulate and verify circuits in Verilog HDL. Held on campus, 28-30 October 2026. Guidelines Eligibility: undergraduate students of recognised institutions, all colleges welcome. Carry a valid student ID card. Participation: individual (solo). One registration per person; only the first counts. Inter-college / inter-specialization: allowed. Open to all branches. Rounds: 2. Round 1 is a qualifying round, Round 2 is a competitive design round. Problem statements: announced by the organisers (Round 2 problems are revealed at the time of the round). Duration: announced by the organisers before each round. Software: Icarus Verilog or Vivado, used offline, on your own laptop. Organisers do not provide computers. Registration: sign up on the Addovedi website, register for Verilog to get your Team ID, then register on Unstop with the Team ID + your Addovedi ID. Registration fee: Rs. 50 per person. Prize pool: up to Rs. 8,000 + goodies (includes 1st and 2nd prize). Rules No internet, mobile phones, storage devices or notes during the rounds unless allowed. No AI tools, code generators or external help. All work must be your own. Copying or sharing solutions leads to disqualification. Only Icarus Verilog / Vivado may be used. No other software or extensions. Bring a fully charged laptop and charger. Organisers are not responsible for hardware, software or battery failure. Report on time. Late entry may be refused. Do not interfere with other participants' laptops, files or work. Follow coordinators and judges at all times. Ties are decided by Round 2 performance, then Round 1. Judges' decision is final. Organisers may modify rules and will inform participants.